Harnessing Microcontrollers to Deliver “High IQ” SSD Power Management and Power Loss Protection Capabilities
Any power failure, no matter if it is just a glitch, a surge or a complete outage, can potentially damage a storage device and corrupt data unless there is an effective power loss protection (PLP) mechanism.
As more and more solid state drives are being deployed in enterprise and industrial environments, an effective power failure protection scheme must be implemented to avert the damages that unexpected power interruptions could bring.
In a typical smart factory, for example, hundreds of SSDs could be deployed. In the event of a power failure, drives can get corrupted, resulting in massive downtime as drives are reformatted and operating systems reinstalled; lost data could adversely impact business operations and affect customer relations; and damaged drives will require replacements, translating to higher operating costs.
How Unsafe Shutdowns Affect an SSD
When a host wants to write data to an SSD, data is initially stored in a temporary buffer (volatile memory) if the SSD has a DRAM cache before being flushed to the nonvolatile flash memory for safekeeping; otherwise, data is stored directly on the NAND flash (nonvolatile memory) where it is stored safely even when power is terminated.
During a normal system shutdown, the host first alerts the SSD that the system is shutting down. The SSD then prepares for power removal, flushing data from volatile storage to nonvolatile flash memory, and then it signals the host that the drive is ready for power removal.
This process accomplishes two important things: First, it makes sure that data is safely stored before power is removed; and second, it ensures mapping tables are updated. Mapping tables keep track of logical block addresses in relation to physical flash pages, pointing where data is stored on the flash drive.
Figure 1. In a normal system shutdown, data is flushed to NAND flash memory and the SSD signals the host that the drive is ready for power removal.
An unsafe shutdown occurs when power is terminated before a shutdown notification is completed. This prevents data in the temporary buffers from being safely flushed onto the nonvolatile NAND, causing data to be corrupted or lost, or rendering the storage device unusable. Examples of unsafe shutdowns include unexpected power outages, accidental removal of the SSD from the computer, unplugging the storage device while power is still on, or battery power loss.
SSDs are particularly vulnerable to power-loss events. Unlike HDDs, SSDs do not have mechanical parts so every component is electronic. The internal data management of an SSD involves many operations that occur in the background, and every power failure can mean undue interruption of those operations, which could affect drive performance.
ATP Unleashes “High IQ” MCU-based PLP in Collaboration with Micron
Power loss protection (PLP) mechanisms have been available on most SSDs, especially those designed for high-performance applications. Such industrial-grade storage devices are typically deployed extensively in harsh environments, operate 24/7, and require uncompromising device integrity.
Typical PLP solutions involve the use of batteries and super capacitors, which provide holdup power that allows the completion of controller and flash functions in the event of a power failure.
ATP Electronics, one of the first to design and release smaller form factor SSDs such as the M.2 2242 with an onboard PLP array, takes the notch higher by employing a microcontroller unit (MCU) that provides unparalleled defense for its Serial ATA and NVMe SSDs to deliver the best PLP protection in the industry.
As a founding member of Micron Technology’s Industrial Quotient (IQ) Partner Program, ATP collaborates closely with Micron to unleash unprecedented PLP capabilities that ensure higher reliability and longer lifecycle to meet and even exceed the rigid requirements of various industries’ mission-critical applications.
The latest SSDs with MCU-based design adhere to the five tenets of Micron’s IQ Matters Program, embodying ruggedized product enhancements, rigid design and testing processes, extensive and rigorous quality testing, extended lifecycle support, and application-specific optimization experience.
“A lot more goes into a true industrial SSD than just a meticulous validation process on the SSD itself. NAND flash performance characteristics change as it endures various different states of usage pattern and related wear,” according to Peter Huang, ATP’s Embedded SSD Business Unit head. “In addition, for an industrial SSD you have to add in various factors of temperature profile. Although a general knowledge base and experience can be built up, a thorough NAND characterization is required for each different NAND flash type and generation. With this challenge, ATP takes a significant resource into NAND flash characterization, an undertaking not possible without the close collaboration with Micron.”
How MCUs Enhance the PLP Mechanism
Integrated into ATP PowerProtector 4, the completely new design of the PLP array utilizes a new power management IC (PMIC) and a new firmware‑programmable MCU that allows the PLP array to perform intelligently in various temperatures, power glitches and power states.
Figure 1. ATP’s new PLP array with PMIC and firmware-programmable MCU
- The MCU intelligently monitors de-glitch power failure conditions and checks the health status of capacitors through the I2C interface.
- Polymer tantalum capacitors provide sufficient sustaining power for data cache flushing if a surprise power -loss condition occurs.
- The MCU can keep detecting power failure conditions; for example, for a 2.5” SSD, if input voltage drops down to less than 4.0 V for several consecutive milliseconds (de-glitch), the MCU will notify the controller to start cache flushing and at the same time, the capacitors will be activated to provide the sustaining power for cache flushing.
Figure 2. The MCU-based design implemented on the latest ATP NVMe SSD
Features and Benefits
- Input Over-Voltage Protection. Input voltage refers to voltage supplied to the circuit. In contrast to “operating voltage range,” which refers to the minimum to maximum voltages the circuit must operate from, “input voltage range” refers to the input voltage limits that a device may tolerate without getting damaged — as an example, for ATP’s 2.5” SSDs, the upper limit is 16 V while for other SSD products, it’s 7 V. When the input voltage is higher than the specifications, it could cause irreversible damage to the components.
ATP’s MCU-based PLP SSDs (also known as PowerProtector 4 SSDs for ATP) feature a switch between the external input voltage and the internal SSD circuit. This switch is controlled by the MCU. As input voltage is monitored by the MCU in real time, it protects the SSD by sending out a signal to the protection switch to cut off the input voltage once it is detected to be higher than the specified maximum tolerance rating.
- Power-up Inrush Current Suppression. Power-up inrush current refers to the high current drawn by a system at the moment it is turned on. This initial current, also known as switch-on surge or input surge current, is required to charge capacitors, inductors and transformers. When the power up inrush current is too high, it can cause damage to circuitry and components.
The MCU-based design available on the ATP SATA and NVMe SSDs ensures that the inrush current does not exceed specified thresholds by enabling a soft start mechanism to minimize the impact of inrush current on the SSD.
- Input Power Noise De-glitch. Input power noise refers to a situation where the power source is unstable, causing unwanted periodic ripples and spikes.
The MCU helps with noise de-glitch through a monitoring mechanism that detects when power dips below a certain value, thus correctly identifying between a power loss or a simple power instability. Without the MCU, power instability may be misjudged as a power failure, and thus falsely trigger a cache flush and potentially lead the SSD to “hang” or freeze.
- Fast Power On-Off Control. Power on-off control refers to the mechanism that manages the timing between power off and the next power on. The MCU-based design can ensure faster and more efficient power on-off control.
The following table illustrates the advantages of SSDs with MCU-based control compared with SSDs that do not:
Table 1. SSD power on-off with/without MCU
With MCU-based PLP, fast power on-off control can be guaranteed without potential risks of undetected drives due to the controller not being correctly reset.
- PLP Capacitors Over Voltage Protection
Polymer tantalum capacitors are important elements of ATP’s PLP technology. By providing holdup power, they ensure that data in the DRAM cache is flushed to NAND flash storage for safekeeping and the last write command is completed when a power loss event occurs.
Overcharging can damage the capacitors and thus compromise their protective function. The MCU monitors capacitor voltage in real time and disables charging once it detects that the voltage is too high. This guarantees that PLP capacitance is enough to complete cache flush during a power loss event. It also prevents the PLP capacitors from aging prematurely.
Summary: Fusion of Strengths Translate to Breakthrough
The PLP capability unleashed by the ATP MCU design requires the ATP/Micron NAND collaboration in order to endure power stability and data integrity to the NAND flash across the SSDs’ performance/life spectrum. Firmware and MCU tuning is required and reflected on the NAND characterization between each NAND generation, NAND configuration, and device density.
The MCU-based PLP for ATP SSDs is a breakthrough made possible by the unwavering commitment to provide “Industrial Only” memory and storage solutions. ATP’s nearly 30 years of manufacturing expertise and the valuable partnership with Micron demonstrate not only enduring collaborations but also shared goals of increasing the “Industrial Quotient” for the customers’ ultimate benefit -- the best total cost of ownership (TCO) value.
ATP PowerProtector 4 integrates the MCU-based design to deliver enhanced power management and PLP capabilities for ATP’s SATA and NVMe SSDs. By combining hardware and firmware solutions, the MCU-based design safeguards data as well as the storage device for higher levels of integrity and reliability. Depending on customer request, enhanced features may be customized, allowing PLP capabilities to be tuned according to unique requirements, application-specific needs or use cases.
The following table summarizes the benefits corresponding to each feature.
Enhanced drive protection
Better data integrity
Fast power on/off control
Precise control of power on/off sequences
Table 2. Summary table shows how each MCU feature and benefit delivers enhanced PLP capability for ATP’s latest solid state drives and modules.
The ATP SSDs with the new MCU-based design include mSATA, 2.5” SSDs, M.2 2242/2280 and NVMe modules. Available with I-Temp and C-Temp support, the SSDs also feature RAID engine support and end-to-end data path protection. ATP’s “Industrial Only” solutions undergo stringent testing and validation to meet the high-reliability, high-performance and high-endurance requirements of mission-critical applications to deliver the best total cost of ownership (TCO) value. For more information on ATP's MCU-based industrial flash storage products, visit the ATP website or contact an ATP Representative.
For more information: www.micron.com/IQ