ATP Electronics' solid state drives (SSDs) feature a robust End-to-End (E2E) Data Path Protection mechanism, which ensures data integrity across all stages of data transmission and storage from the host to the NAND flash storage device controller.E2E protects ATP SSDs from signal degradation, prevents data corruption or loss during power interruptions, mitigates read disturbances, and reduces uncorrectable error rates.

ATP’s E2E mechanism safeguards against soft errors that corrupt memory bits and alter stored data or change instructions in the program. These errors do not cause physical damage to the memory or storage device but will cause damage to the data.

The following block diagram illustrates ATP’s E2E mechanism at work:

                                     

Multi-Layered Approach

ATP’s E2E data path protection mechanism offers full data path coverage to minimize vulnerabilities in all critical pathways.

1. Detecting and Correcting Errors

ATP uses the following advanced techniques to identify and fix errors

• SRAM/DRAM: Parity bit and error correcting code (ECC) for Single-bit Error Correction and Double-bit Error Detection (SECDED)
• NAND Flash: Low-Density Parity Check (LDPC) and Read Retry for error correction, RAID Parity for RAID-like redundancy

 

2. Verifying the Integrity of Data

Cyclic Redundancy Check (CRC) ensures signal integrity by validating data at every transfer point. This entails the generation and checking of parity bits at multiple points, such as the SRAM, DRAM, and NAND flash to ensure that the data is accurate and uncorrupted.

 

3. Creating Error Logs

When an error is detected, the event is recorded for analysis and alerts, enabling the system to provide a prompt response.

 

For more information on ATP’s End-to-End Data Path Protection feature, please contact an ATP Representative in your area.